1. Field of the Invention
The present invention relates in general to the formation of an integrated circuit including capacitors. In particular, the present invention relates to a method for forming a metal capacitor in a damascene process.
2. Description of the Related Art
Capacitors are deployed in various integrated circuits. For example, decoupling capacitors provide improved voltage regulation and noise immunity for power distribution. Capacitors also have wide applications in analog/logic, analog-to-digital, mixed signal, radio frequency circuit operations, and others.
A conventional method of manufacturing a semiconductor apparatus including a capacitor 20 that is formed of metal-insulator-metal layers is described with reference to FIGS. 1Axcx9c1D. As shown in FIG. 1A, an aluminum layer is deposited on an insulator 12 which contains interconnections and is formed on a silicon substrate having devices (not shown) thereon and therein. The aluminum layer is then patterned by masking and etching to form wires 14a and 14b. As shown in FIG. 1B, an insulator 16 with a tungsten plug 18 (hereafter xe2x80x9cW-plugxe2x80x9d) used to connect the aluminum wire 14a and the to-be-formed capacitor is formed on the aluminum wires 14a and 14b and the insulator 12. As shown in FIG. 1C, a first conductive plate 21, an insulator 22 and a second conductive plate 23 are sequentially deposited on the insulator 16 and the W-plug 18, and then patterned by masking and etching to obtain a capacitor 20. The first conductive plate 21, the lower electrode, is connected with the aluminum wire 14a through the W-plug 18. Another insulator 26 is deposited on the insulator 16 and the capacitor 20. The insulators 16 and 26 are patterned and W-plug 28a and W-plug 28b are formed therein. As shown in FIG. 1D, an aluminum layer is deposited on the insulator 26 and the W-plugs 28a and 28b. The aluminum layer is then patterned by masking and etching to form wires 34a and 34b. The aluminum wire 34a is connected with the second conductive plate 23 through the W-plug 28a. The aluminum wire 34b is connected with the aluminum wire 14b through the W-plug 28b. 
The above-mentioned traditional processes for integrating the capacitor 20 into an integrated circuit require several masking and etching steps to form the capacitor 20, which may increase overall fabrication costs.
As well, the aluminum used to fabricate the traditional interconnections cannot satisfy present-day requirements for enhanced integration and highly demanding speeds of data transmission. Copper (Cu) has high electric conductivity to reduce RC delay and can be substituted for the aluminum in the conductive wires. The use of copper in the conductive wires requires the use of processes, that is, damascene processes, because copper cannot be patterned by etching. This is because the boiling point of the copper chloride (CuCl2) produced by copper and the chlorine plasma usually used to etch metal is relatively high, about 1500xc2x0 C.
A thin-film capacitor formed by combining with the Cu damascene proceees is disclosed in U.S. Pat. No. 6,180,976 B1. In the ""976 B1 patent, the lower electrode of the thin-film capacitor is also formed by the damascene process. The ""976 B1 patent has the advantage of saving a masking step. However, a chemical mechanical polishing process is required to remove undesired metal residue to form the lower electrode. Dishing is likely to occur on the lower electrode and result in an uneven surface. Therefore, the thickness of the insulator can not be kept uniform to stablize the electrical properies of the capacitors.
It is an object of the present invention to provide an improved method for forming a metal capacitor in a damascene process.
It is another object of the present invention to reduce the masking steps required to form a metal capacitor in a damascene process.
Yet another object of the invention is to reduce the cost of manufacturing an integrated circuit including a capacitor.
It is a further object of the invention to provide easily controllable processes of manufacturing an integrated circuit including a capacitor.
The present invention provides a method for forming a metal capacitor with a damascene process. Before fabricating the thin-film metal capacitor, a first Cu wire and a second Cu wire, surrouded with a barrier layer and a first sealing layer, are prepared in a first insulator. A second insulator and a stop layer are formed on the sealing layer in sequence. The first and second Cu plugs are disposed in the first sealing layer, the second insulator and the stop layer. A first metal layer, a fourth insulator and a second metal layer are formed on the stop layer in sequence. The second metal layer, the fourth insulator and the first metal layer are subjected to photolithography and etching processes to form a conductive wire with a remaining fourth insulator and a remaining second metal layer thereon and a capacitor. A lower electrode of the capacitor is connected with the first Cu wire through the first Cu plug and the conducting wire is connected with the second Cu wire through the second Cu plug. The remaining second metal layer is then removed. A fifth insulator with a flat surface is formed on the capacitor, the remaining fourth insulator and the third insulator. A plurality of dual damascene structures, including a third plug, a fourth Cu plug, a third Cu wire and a fourth Cu wire, are formed in the fifth insulator. An upper electrode of the capacitor is connected with the third Cu wire through the third Cu plug, and the conducting wire is connected with the fourth Cu wire through the fourth Cu plug. A second sealing layer is formed, covering at least the third and fourth Cu wires.
These and other objects of the present invention will become readily apparent upon further review of the following specification and drawings.